INTEL MICROPROCESSORS ARCHITECTURE (Record no. 231912)

000 -LEADER
fixed length control field 00383nam a2200157Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 210301b2012 xxu||||| |||| 00| 0 eng d
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 720 BRE
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name BREY, B BARRY
245 ## - TITLE STATEMENT
Title INTEL MICROPROCESSORS ARCHITECTURE
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication, distribution, etc. DELHI
Name of publisher, distributor, etc. PEARSON
Date of publication, distribution, etc. 2012.
300 ## - PHYSICAL DESCRIPTION
Extent 926
500 ## - GENERAL NOTE
General note ARCHITECTURE
690 ## - LOCAL SUBJECT ADDED ENTRY--TOPICAL TERM (OCLC, RLIN)
Topical term or geographic name as entry element COMPUTER SCIENCE AND ENGINEERING
905 ## - LOCAL DATA ELEMENT E, LDE (RLIN)
a Books
906 ## - LOCAL DATA ELEMENT F, LDF (RLIN)
a MRU
907 ## - LOCAL DATA ELEMENT G, LDG (RLIN)
a 148737
Holdings
Withdrawn status Lost status Damaged status Not for loan Home library Current library Date acquired Total Checkouts Full call number Barcode Koha item type
        Manav Rachna University Manav Rachna University 06/03/2018   720 BRE 43726 Book
        Manav Rachna University Manav Rachna University 06/03/2018   720 BRE 43725 Book
© Manav Rachna Vidyantariksha. All Rights Reserved.

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